类型：软IP
简短描述：ARM9E-S Core
详细描述：
The ARM9E-S core has the ARM architecture v5TE. This includes an enhanced
multiplier design for improved DSP performance.
The ARM9E-S core is a member of the ARM family of 32-bit microprocessors. The
ARM family offers high performance for very low power consumption and gate count.
The ARM architecture is based on Reduced Instruction Set Computer (RISC)
principles. The reduced instruction set and related decode mechanism are much simpler
than those of Complex Instruction Set Computer (CISC) designs. This simplicity gives:
• a high instruction throughput
• an excellent real-time interrupt response
• a small, cost-effective, processor macrocell.
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