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FPGA IP
    Xilinx:OPB Multi Channel (up to 256) HDLC Controller2014-01-06 
    Xilinx:OPB Single Channel HDLC Controller2014-01-06 
    Xilinx:PLB Gigabit Ethernet Media Access Controller (PLB GEMAC)2014-01-06 
    Xilinx:Reed-Solomon Decoder2014-01-06 
    Xilinx:SPI-3 (PL3) Link Layer Interface, 1-channel2014-01-06 
    Xilinx:SPI-3 (PL3) Link Layer Interface, 2-channel2014-01-06 
    Xilinx:SPI-3 (PL3) Link Layer Interface, 4-channel2014-01-06 
    Xilinx:SPI-3 (PL3) Link Layer Interface, Multi-channel2014-01-06 
    Xilinx:SPI-3 (PL3) Physical Layer Interface, 2-channel2014-01-06 
    Xilinx:SPI-4 Phase 2 (PL4) Interface Solutions2014-01-06 
    Xilinx:Turbo Convolutional Code Decoder, CDMA2000/3GPP22014-01-06 
    Xilinx:Turbo Convolutional Code Encoder, CDMA2000/3GPP22014-01-06 
    Xilinx:XAUI2014-01-06 
    Xilinx:OPB IPIF Architecture2014-01-06 
    Xilinx:OPB to DCR Bridge2014-01-06 
    Xilinx:OPB to OPB Bridge (Lite Version)2014-01-06 
    Xilinx:OPB to PCI Full Bridge (32/33)2014-01-06 
    Xilinx:OPB to PLB Bridge2014-01-06 
    Xilinx:PCI-X 64-bit/133 MHz Core2014-01-06 
    Xilinx:PCI Express Endpoint Core (DO-DI-PCIEXP)2014-01-06 
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