类型:Hard IP
简短描述:Programmable Sigma-Delta ADC. SNR - Power - Bandwidth Tunable A/D Converter
详细描述:
The Intrinsix Programmable Sigma-Delta Modulator (SDM) based ADC is a proprietary IP block, based on our patented SDM development process, with six programmable bandwidth settings. It includes a third-order switched-capacitor sigma-delta modulator employing 4-level (2-bit) quantization. Furthermore, the IP block includes a high-performance proprietary Dynamic Element Matching (DEM) logic to greatly reduce the inevitable adverse effects of multi-bit quantization.
The Intrinsix SDM ADC is implemented using UMC 0.18 μm CMOS process with MiM (Metal-insulator-Metal) capacitors. There are six possible bandwidth settings for the IP, which can be configured using a three-bit digital input signal, SDM_BW[2:0]. The maximum input signal to the IP block is a 2.0 Vpp (peak-to-peak voltage) differential voltage with 0.85 Volt common-mode voltage (Vcm). Power supply voltages are VDDA=1.8 Volt and VSSA=0 Volt, both for analog and digital circuits.
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Differential VREF inputs
Common Mode Voltage range: 0.85V +/- 0.1V
Third-order two-bit Sigma-Delta Modulator (SDM) with 0 - 100KHz bandwidth, and no idle tones
Incorporates a high-performance DEM logic
Analog (AVDD) Supply voltage: 1.8V +/- 10%
Digital (DVDD) Supply voltage: 1.8V +/- 10%
Low power consumption: 1.8 - 5mW (in-system programmable)
High performance: 101 - 110dB (in-system programmable)
SDM enable allows for granular control of power consumption
Specification driven temperature range: 0oC to +100oC (junction temperature). In this temperature range, the IP block can meet all the performance specifications.
Operational temperature range: -40oC to +125oC (junction temperature). In this temperature range, the IP block should be functional, but it may or may not meet the performance specifications.
Technology: UMC 0.18μm CMOS process with MiM capacitors
Die Size: approximately 1.5mm2 (excluding pads)