The USB 2.0 PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel?UTMI standard. It provides a High/Full-Speed USB analog front-end with a build-in 8-bit/16-bit parallel interface, therefore, easy to interface with USB2.0 Device System.

Compliant with USB Spec Rev2.0  
Compliant with UTMI Spec Rev1.05  
Support 480Mbit/s 揌igh Speed?and 12Mbit/s 揊ull Speed?  
Support 60MHz/8-bit unidirectional interface and 30MHz/16-bit bidirectional interface.  
12MHz external crystal, internal oscillator and PLL are used to generate high-speed internal clock and CLKOUT output.  
Internal terminations include 1.5Kohm pull-up resistor switching on DP/DM in the FS state and the HS chirp state.  
Clock and data recovery from serial stream on the USB bus.  
Support detection of USB reset, suspend, resume and remote-wake-up features.  
Support test modes defined in USB2.0 Specification.  
NRZI and Bit Stuff encoding and decoding.