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Aurora VLSI, Inc.:AU-UB7220
类型:软IP
简短描述:USB 2.0 Device AMBA Subsystem Core (Mini Version), AMBA AHB Bus USB 2.0 Device with DMA
详细描述:

The AU-UB7220 USB 2.0 Device AMBA Subsystem provides a USB 2.0 Device peripheral
subsystem for AMBA based SOCs. It contains a USB 2.0 Device that connects seamlessly to the
AMBA AHB Bus. It minimizes gate count by including only the required USB endpoints plus
two bulk/iso transfer endpoints. A DMA Engine is included to move bulk and isochronous USB
data. The figure below shows its use within an SOC. The USB 2.0 Device AMBA Subsystem
Core is available as a synthesizable Verilog model from Aurora VLSI, Inc.


工艺:
代工厂:
应用:
特色:

USB 2.0 Device
• Four endpoints:
- EP0- control endpoint, accepts SETUP, IN, and OUT control transactions
- EP1- interrupt endpoint, accepts IN and OUT interrupt transactions
- EP2- IN endpoint; accepts IN bulk and isochronous transactions
- EP3- OUT endpoint; accepts OUT bulk and isochronous transactions
• Includes control pipe registers and USB Descriptor RAMs at EP0
• USB command execution in EP0
• 8 or 16 bit UTMI interface
• Accepts stalls from the application logic
• Low gate count
DMA/AMBA Interface
• AMBA AHB Bus interface
• 4 channel DMA Engine
- bulk/iso IN data from EP1 and EP2 to the USB 2.0 Device block
- bulk/iso OUT data from the USB 2.0 Device block to EP1 and EP3
• Physical DMA addresses
• Programmable DMA starting address
• Programmable DMA transfer count- up to 64 Kbytes
• Programmable DMA AMBA Bus interface transaction size- 8 to 1024 bytes
• Programmable DMA AMBA Bus data transfer size- 4 or 8 bytes
• Locked DMA operation optional (software programmable)
• Direct software writes or information extracted from descriptors in memory, to
program DMA control information
• 2 AMBA Bus master interfaces- one for IN data, one for OUT data
• AMBA Bus slave interface for register reads and writes
• Interrupts:
- DMA completed
- IN transaction data sent
- OUT transaction data received

    Aurora VLSI, Inc.:SSU7220
    Aurora VLSI, Inc.:SSU7320
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