The AU-UB7211 USB 1.1 Device AMBA Subsystem provides a USB 1.1 Device peripheral
subsystem for AMBA based SOCs. It contains a USB 1.1 Device that connects seamlessly to the
AMBA AHB Bus. It minimizes gate count by including only the required USB endpoints plus
two bulk/iso transfer endpoints. A DMA Engine is included to move bulk and isochronous USB
data. The figure below shows its use within an SOC. The USB 1.1 Device AMBA Subsystem
Core is available as a synthesizable Verilog model from Aurora VLSI, Inc.

USB 1.1 Device
• Four endpoints:
- EP0- control endpoint, accepts SETUP, IN, and OUT control transactions
- EP1- interrupt endpoint, accepts IN and OUT interrupt transactions
- EP2- IN endpoint; accepts IN bulk and isochronous transactions
- EP3- OUT endpoint; accepts OUT bulk and isochronous transactions
• Serial interface to PHY transceiver chip
• Accepts stalls from the application logic
• Low gate count
DMA/AMBA Interface
• AMBA AHB Bus interface
• 2 channel DMA Engine
- bulk/iso IN data from EP2 to the USB 1.1 Device block
- bulk/iso OUT data from the USB 1.1 Device block to EP3
• Physical DMA addresses
• Programmable DMA starting address
• Programmable DMA transfer count- up to 64 Kbytes
• Programmable DMA AMBA Bus interface transaction size- 8 to 1024 bytes
• Programmable DMA AMBA Bus data transfer size- 4 or 8 bytes
• Locked DMA operation optional (software programmable)
• Direct software writes or information extracted from descriptors in memory, to
program DMA control information
• Dedicated AMBA Bus master interface for each DMA channel
• AMBA Bus slave interface for register reads and writes
• Interrupts:
- DMA completed
- IN transaction data sent
- OUT transaction data received