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Silicon Image, Inc:Receiver IP Core
类型:软IP
简短描述:Receiver IP core
详细描述:

The HDMI 1.4 Specification consolidates the transmission of HD video, audio, data and control in a single cable by enabling high speed bidirectional communication thru the HDMI cable. Silicon Image’s Receiver IP core supports both HDMI 1.3 and new HDMI 1.4 features such as HDMI Ethernet Channel and Audio Return Channel. An HDMI Ethernet Channel enabled device can send and receive data via 100 Mbps Ethernet over an HDMI cable utilizing the new IP core and the customer’s own Ethernet transceiver. The Audio Return Channel allows the TV tuner to send audio streams from the TV to an HDMI attached A/V receiver for audio processing to improve sound quality. 3D video standards are supported up to 1080p frame size.

 


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           Digital Video Outputs

  • 24/30/36/48-bit RGB/YCbCr 4:4:4 (Deep Color)
  • x.v/Color
  • 16/20/24-bit YCbCr 4:2:2
  • 8/10/12-bit YCbCr 4:2:2 (ITU 601 and 656)
  • 12/15/18/24-bit DMO (Digital Multimedia Output) RGB/YCbCr 4:4:4
  • Separate and embedded syncs

    Video Processing 
  • HDMI: Resolutions up to 16-bit 1080p30 and 12-bit 1080p60
  • Mobile HD: Resolutions up to 8-bit 1080p (30Hz)
  • Color - space conversion
  • Support of 3D video formats up to 1080p
  • 4:2:2-to-4:4:4 and 4:4:4-to-4:2:2 conversion

    Digital Audio Outputs
  • Industry standard S/PDIF and I2S output
  • Direct Stream Digital (DSD) for Super Audio CD
  • Dolby® TrueHD and DTS-HD Master Audio high bit rate support up to 24Mbit/s
  • 2/8 Channel Dolby Digital®, DTS, DVD-Audio and PCM support up to 192 kHz
  • IEC 60958 and IEC 61937 compatible

    System Operation
  • Automatic configuration supported
  • Parallel and Slave I2C I/F, Slave I2C (HDCP)
  • Interrupt pin and registers
  • Monitor detection (hot plug & transmitter detect)
  • HDCP cipher engine decrypts video/audio
  • Programmable Data Enable (DE)
  • CEC (Consumer Electronics Control)

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    Silicon Image, Inc:Transmitter IP core
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