类型:Soft IP
简短描述:SoC Kernel for ARM9 AMBA Bus Systems
详细描述:
The PIP-AMBA-E provides the essential IP cores and infrastructure software needed for systems using a microprocessor from the ARM 9 family with the AMBA bus, a de facto open standard. Ready for software development out of the box but also easy to customize and extend, it serves as a basic platform for the rapid development of a variety of system-on-chip (SOC) applications.
The platform is well suited to a variety of AMBA-based SoC designs. It includes the multi-master and arbitration features of the high-performance AHB bus, and a bridge to the slower APB peripherals bus. The architecture makes it straightforward to add additional IP cores or custom logic to either bus.
The platform includes synthesizable HDL cores for the AHB and APB buses, plus various timers, controllers, interface functions, communications functions, and an internal SRAM block. (FPGA netlist versions are also available.)
工艺:
代工厂:
应用:The platform is suitable for small microcontrollers and mixed-signal controllers for a variety of applications, including factory automation, automotive systems, hand-held devices, motor controls, and intelligent toys.
特色:
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Integrated IP cores and software subsystem provides basic infrastructure for many SoC applications
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Platform saves significant time over acquiring and integrating separate elements
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Works with low-power, 32-bit ARM 9 processors
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Built on AMBA standard bus for broad applicability
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Enables both the high-performance AHB and the APB peripherals buses
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Easily add custom logic or additional IP cores to tailor or expand the system
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Immediately begin software development and test
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Supports ARM® RealView®, GNU and other development tools
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Complete infrastructure includes essential hardware and software
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Included IP cores:
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Microprocessor interface
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APB Bridge
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Timers
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Scalable Interrupt Controller
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Parallel I/O
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Internal SRAM with Controller
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Software
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boot code
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Interrupt Service (ISR) code
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Main code with Scheduler
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Device driver code
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Hardware Level API
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Plug-in architecture for user-defined custom IP blocks
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Support for real-time operating systems (RTOS)
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Comprehensive SOC test and validation suite, including:
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AMBA Bus Functional Model with support for interrupts and subroutines
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Sophisticated HDL Testbench with external models and interfaces
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System Level Simulation scripts, C-test/Macro test code and comparison utilities
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Complete user documentation