The R8051XC-MAC-L subsystem combines an 8-bit processor core, a 10/100 Mbps Ethernet MAC device controller core, a hardware accelerator, and a third-party TCP/IP software stack to provide Internet connectivity for System on Chip (SoC) designs.

The subsystem’s pre-integrated CAST cores work together as a fast, compact, programmable Ethernet controller. The R8051XC Microcontroller Core executes the MCS®51 instruction set with just one clock per cycle, has numerous optional features and peripherals capabilities, and has been proven in hundreds of customer designs. The MAC-L Media Access Controller Core supports full- and half-duplex operation, has a Media Independent Interface (MII) for simple control, and includes a parameterized, multi-packet FIFO implemented using dual-port RAMs.

A custom Hardware Accelerator core also integrated in the subsystem efficiently controls checksums for common TCP/IP protocols like TCP, IPv4, UDP and ICMP.

The subsystem was proven with the CMX-Micronet™ TCP/IP software stack from CMX Systems, Inc. This features a MAC-L driver for optimum operation with the 8051 and Ethernet cores.

The subsystem is designed for reuse in ASIC and FPGA implementations. The design is strictly synchronous with positive-edge clocking and a synchronous reset without internal tri-states; therefore, the scan insertion is straightforward.

• Integrates CAST cores and adds software stack:
  R8051XC 8-bit microcontroller core
  MAC-L 10/100 Mbps Ethernet Media Access Controller core
  HA checksum hardware accelerator
  CMX-Micronet™ TCP/IP stack from CMX Systems, Inc.

Subsystem highlights:

• Reduces need for Ethernet controller hardware knowledge
• Fast, compact implementation (less then 47K gates for 0.18μ)
• Hardware accelerator for checksum control processing increases throughput and frees 8051 cycles for system use
• Development board and evaluation system available