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Aurora VLSI, Inc.:AU-SS3001
类型:软IP
简短描述:3 Port SDRAM/SRAM/Flash Controller AMBA Subsystem Core, AMBA AHB Bus SDRAM/SRAM/Flash Controller
详细描述:

The AU-SS3001 SDRAM/SRAM/Flash Controller AMBA Subsystem provides a three port
SDRAM controller, single port SRAM controller, and single port flash controller subsystem for
AMBA based SOCs. It contains an SDRAM controller, SRAM controller, and NAND/NOR
flash controller that connect seamlessly to the AMBA AHB Bus as an AMBA Bus slave. It also
has two additional generic SDRAM request ports. The SDRAM/SRAM/Flash Controller AMBA
Subsystem Core is available as a synthesizable Verilog model from Aurora VLSI, Inc.


工艺:
代工厂:
应用:
特色:

• SDRAM controller and interface
• SRAM controller and interface
• NAND flash controller and interface
• NOR flash controller and interface
• All interfaces share chip pins for reduced pin count
• 32 or 64 bit AMBA AHB Bus interface- user configurable
• AMBA Bus slave
• 2 generic SDRAM request interfaces


au-ss3001_brief.rar

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