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Xilinx:PLB V34 (DO-EDK)
类型:软IP
简短描述:PLB V34 (DO-EDK)
详细描述:Xilinx 64-bit Processor Local Bus (PLB) consists of a bus control unit, a watchdog timer, and separate address, write, and read data path units with a a three-cylcle only arbitration feature. It contains a DCR slave interface to pro-vide access to its bus error status registers. It also contains a power-up reset circuit to ensure a PLB reset is generated if no external reset has been provided.
工艺:0.25um
代工厂:
应用:
特色:

    Xilinx:PLB UART 16550 Controller
    Xilinx:Processor System Reset Module
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