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Xilinx:PLB to OPB Bridge (DO-EDK)
类型:软IP
简短描述:PLB to OPB Bridge (DO-EDK)
详细描述:The On-Chip Peripheral Bus (OPB) to Processor Local Bus (PLB) Bridge module translates OPB transactions into PLB transactions. It functions as a slave on the OPB side and a master on the PLB side. Access to the control register and bus error status registers is user selectable from either the OPB or an optional DCR interface. The OPB to PLB Bridge is necessary in systems where an OPB master device, such as a DMA engine or an OPB based coprocessor, requires access to PLB devices (i.e. high speed memory devices, etc.).
工艺:0.25um
代工厂:
应用:
特色:

    Xilinx:PLB SDRAM Controller
    Xilinx:PLB UART 16450 Controller
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