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Xilinx:OPB ATM Utopia Level 2 Master and Slave
类型:软IP
简短描述:OPB ATM Utopia Level 2 Master and Slave
详细描述:The OPB ATMC Design soft IP core is designed for Xilinx FPGAs with a UTOPIA L2 interface that is attached to the On-Chip Peripheral Bus (OPB). The core supports several of the features defined in UTOPIA L2 v1.0 as written by the ATM forum technical committee. The core is specified to operate at an interface frequency between 10 and 40 MHz with a system operating of 125 MHz through the OPB interface. An evaluation version of this core is available with the Embedded Development Kit.
工艺:0.25um
代工厂:
应用:
特色:

    Xilinx:OPB 10/100 Ethernet MAC Lite (OPB EMAC Lite)
    Xilinx:OPB 10/100 Ethernet Media Access Controller (EMAC)
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