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Xilinx:8b/10b Encoder
类型:软IP
简短描述:8b/10b Encoder
详细描述:The 8b/10b Encoder IP core provides the encoding of 8-bit bytes into 10-bit symbols. It also provides the encoding of 12 special ("K") characters in addition to the 256 possible byte combinations. The core tracks "running disparity" to ensure that consecutive symbols have the correct disparity. The user has the choice of a LUT-based implementation, using FPGA slices, or a block memory-based implementation, using one of the dedicated on-chip block memory blocks. The core has multiple optional inputs and outputs, enabling the user to track data moving through the core. The block RAM implementation can be used to create a secondary ("B") Encoder with almost no additional resource.
工艺:0.25um
代工厂:
应用:
特色:

    Xilinx:8b/10b Decoder
    Xilinx:DOCSIS ITU-T J.83 Modulator
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