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Xilinx:FIFO Generator
类型:软IP
简短描述:FIFO Generator
详细描述:The FIFO Generator LogiCORE is a first-in/first-out memory queue which provides expanded functionality over the CORE Generator Asynchronous and Synchronous FIFOs. The FIFO Generator should be used in all new Virtex™, Virtex™-E, Virtex™-II, Virtex™-II Pro, Spartan™-II/E and Spartan™-3 designs wherever an Asynchronous or Synchronous FIFO function is required. The core is part of the standard catalog of IP cores delivered through the CORE Generator at no additional cost to ISE customers.
工艺:0.25um
代工厂:
应用:
特色:

    Xilinx:FD-based Shift Register
    Xilinx:LD-based Parallel Latch
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