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Xilinx:Content Addressable Memory (CAM)
类型:软IP
简短描述:Content Addressable Memory (CAM)
详细描述:The Content Addressable Memory (CAM) IP core can be configured as either an SRL16-based CAM with a 16 clock-cycle write operation and a one clock-cycle search operation, or as a block RAM implementation with only a two clock-cycle write operation. It has full ternary support for both write and search operations. The CAM also supports initialization of binary and ternary CAMs with binary data from a .COE file. The CAM supports optional simultaneous write and search operations, with an output to warn the user of possible collisions. This latest version of the CAM core also supports multiple matches, providing indicators for distinguishing multiple match scenarios, and match resolution logic for generating deterministic results to searches which result in multiple matches.
工艺:0.25um
代工厂:
应用:
特色:

    Xilinx:BUFT-based Multiplexer Slice
    Xilinx:Distributed Memory
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