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Xilinx:Multiply Generator
类型:软IP
简短描述:Multiply Generator
详细描述:The Multiplier Generator IP core generates parallel multipliers, sequential multipliers, serial-sequential multipliers, and fixed and reloadable constant coefficient multipliers. It supports two's complement signed/unsigned modes. It also supports inputs ranging from 1 to 64 bits wide and outputs ranging from 1 to 129 bits wide. The implementation can range from purely combinatorial to fully pipelined with optional registered output, clock enable and asynchronous or synchronous clears.
工艺:0.25um
代工厂:
应用:
特色:

    Xilinx:Multiplier Accumulator
    Xilinx:Pipelined Divider
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