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Xilinx:Multiplier Accumulator
类型:软IP
简短描述:Multiplier Accumulator
详细描述:The Multiplier Accumulator IP core product is a parallel multiplier accumulator module that performs fixed or programmable-length accumulations. The core's A and B inputs use unsigned or signed data of up to 64 bits wide. The coefficients may be set in one of two modes: constant mode for a fixed coefficient value, or variable mode in which the coefficients are sampled in parallel with the input data. The core has selectable pipeline levels. It offers truncation and rounding of the multiplier output. The accumulator can be from 1 to 258 bits, and supports addition or subtraction. It has hand-shaking signals, allowing it to easily interface with other modules. The core also has an accumulation saturation option, optional carry in, carry out, overflow pins, and input/output registers.
工艺:0.25um
代工厂:
应用:
特色:

    Xilinx:Comparator
    Xilinx:Multiply Generator
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