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Xilinx:Digital Up Converter
类型:软IP
简短描述:Digital Up Converter
详细描述:This Digital Up Converter (DUC) LogiCORE performs the modulation of a baseband signal to an intermediate frequency signal, for use as the input to a digital-to-analog converter. It has a configurable data path comprising a cascade of two polyphase interpolator FIR filters, a CIC filter, a DDS and a mixer. The FIR filters have configurable filter lengths from 4 to 1024 taps and coefficient precision from 4 to 32 bits. Each polyphase interpolator provides a rate change of 2. The FIR filter is implemented as a Multiplier-Accumulator architecture for optimal resource usage. The CIC interpolation rate changes from 16 to 1448. The DDS supports a 0.18 Hz tuning resolution and 115 dB spurious free dynamic range. The core supports truncation or optional bias-free convergent rounding to avoid DC bias issues.
工艺:0.25um
代工厂:
应用:
特色:

    Xilinx:Digital Down Converter (DDC)
    Xilinx:Direct Digital Synthesizers (DDS)
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